The invention relates to a memory device, and more particularly to a memory device including a molecular system with ionic complexes distributed in the system.
Various types of electrically addressable memory devices for computer data storage are known in the art. Most of these devices store a data bit as a charge in a capacitor. The charge state can be read out and the output signal used to control processes in a computer processor. Most of these devices require complex silicon processing steps and a dedicated device architecture which depends on memory type.
Memory devices are distinguished by their speed and data retention characteristic. Dynamic random access memory (DRAM) is a volatile memory characterized by a destructive read. This means that it is necessary to supply voltage to the memory bits at all times, or the information will disappear. Furthermore, each memory element has associated with it a transistor. Static random access memory (SRAM) stores data in a bistable flip-flop, commonly consisting of cross-coupled inverters. It is called xe2x80x9cstaticxe2x80x9d because it will retain a value as long as power is supplied. It is still volatile, i.e. it will lose its contents when the power is switched off, in contrast to ROM. SRAM is usually faster than DRAM, but each bit requires several transistors (about six), so that a lesser number of bits of SRAM fit in the same area as compared to DRAM.
Erasable programmable read only memory (EPROM) is a type of storage device in which the data is determined by electrical charge stored in an isolated (xe2x80x9cfloatingxe2x80x9d) MOS transistor gate. The isolation is good enough to retain the charge almost indefinitely (more than ten years) without an external power supply. The EPROM is programmed by xe2x80x9cinjectingxe2x80x9d charge into the floating gate, using a technique based on the tunnel effect. This requires higher voltage than in normal operation (usually 12V-25V). The floating gate can be discharged through UV-illumination or electrically (EEPROM). Usually bytes or words can be erased and reprogrammed individually during system operation. EEPROM is more expensive and less dense than RAM. It is appropriate for storing small amounts of data which is changed infrequently. Another known non-volatile memory device is a ferromagnetic RAM (Fe-RAM), wherein the individual storage cells do not require a dedicated transistor.
When using passive memory devices connected in parallel, e.g., in form of an array, leakage current problems can occur. Leakage problems can be reduced, for example, by forming a Schottky barrier between an organometallic charge-transfer complex, such as M(TCNQ) and the underlying electrode. Alternatively, it has been proposed to provide a rectifying diode in series with the switching resistance at each intersection point of a memory array. This requires additional layers and processing steps.
The molecular composite material can have stable and metastable states that affect the retention time of the device. The device has an electrically insulating off state and at least one electrically conducting on state. The device can be switched reproducibly between the on state(s) and the off state by applying an electrical field across the device with a predetermined polarity and magnitude for a predetermined time.
It would therefore be desirable to provide a device that has a built-in barrier that reduces leakage currents.
The present invention provides a novel memory cell comprising an active region including a molecular system. Ionic complexes may be distributed in the molecular system. At least one write electrode applies an electric field to the active region to write information to the active region, and at least one read electrode is provided for reading the information from the active region.
In accordance with an aspect of the invention, the memory cell may includes a pair of write electrodes for writing information to the memory cell, and the active region responsive to an electric field applied between the first and second write electrodes for switching between an on state and an off state. A pair of read electrodes detect whether the active region is in the on state or in the off state to read the information from the memory cell.
In accordance with another aspect of the invention, a memory device includes a memory cell array composed of multiple memory cells arranged in row and column directions. Each memory cell comprises an active region including a molecular system and ionic complexes distributed in the molecular system, first and second write electrodes for applying an electric field to the active region, to write information to the memory cell, and first and second read electrodes for detecting electrical conductivity of the active region, to read the information from the memory cell.
In accordance with another aspect of the invention, a memory cell in a memory device including a memory cell array composed of multiple memory cells arranged in row and column directions, comprises first and second barrier elements arranged in contact with the active region to reduce leakage current.
In accordance with an embodiment of the invention, the first barrier element may be made of material having a work function different from a work function of the second barrier element. For example, the first and second barrier elements may be made of different metals.
Different materials having different work functions may be used for the read electrodes, causing the resistance of a memory cell to be substantially different in a forward biased and reverse biased readout configuration. The write operation, on the other hand, is unaffected by the difference in the work function of the readout electrodes.
Further features and advantages of the present invention will be apparent from the following description of preferred embodiments.